Method of fabricating light-emitting device and light-emitting device

ABSTRACT

A light-emitting device  100  has ITO transparent electrode layers  8, 10  used for applying drive voltage for light-emission to a light-emitting layer section  24 , and is designed so as to extract light from the light-emitting layer section  24  through the ITO transparent electrode layers  8, 10 . The light-emitting device  100  also has contact layers composed of In-containing GaAs, formed between the light-emitting layer section  24  and the ITO transparent electrode layers  8, 10 , so as to contact with the ITO transparent electrode layers respectively. The contact layers  7, 9  are formed by annealing a stack  13  obtained by forming GaAs layers  7′, 9′  on the light-emitting layer section, and by forming the ITO transparent electrode layers  8, 10  so as to contact with the GaAs layers  7′, 9′,  to thereby allow In to diffuse from the ITO transparent electrode layers  8, 10  into the GaAs layers  7′, 9′.  This provides a method of fabricating a light-emitting device, in which the ITO transparent electrode layers as the light-emission drive electrodes are bonded as being underlain by the contact layers, to thereby reduce contact resistance of these electrodes, and to thereby make the contact layers less susceptible to difference in the lattice constants with those of the light-emitting layer section during the formation thereof.

TECHNICAL FIELD

This invention relates to a method of fabricating a light-emittingdevice, and a light-emitting device.

BACKGROUND ART

Of various semiconductor light-emitting devices having a light-emittinglayer section composed of compound semiconductors formed therein, thoseused as light-emitting diode light sources for display or lighting havea metal electrode applying drive voltage to the light-extraction surfaceside of the light-emitting layer section formed therein. The metalelectrode acts as a light interceptor, and is typically formed so as tocover only the center portion of the main surface of the light-emittinglayer section, so as to make it possible to extract the light from thesurrounding non-electrode-forming area. The metal electrode, however,remains as a light interceptor, and raises another problem in that anextreme reduction in the electrode area inhibits current spreading inthe device plane, and undesirably limits the extractable light energy.It has, therefore, been proposed that the entire surface of thelight-emitting layer section is covered with an ITO (indium tin oxide)transparent electrode layer having a high electro-conductivity, aimingat achieving both of improvement in the light extraction efficiencythrough the transparent electrode layer and improvement in the currentspreading effect, as typically disclosed in Japanese Laid-Open PatentPublication “Tokkaihei” Nos. 1-225178 and 6-188455.

Both publications pointed out a problem in that formation of the ITOtransparent electrode layer directly on the light-emitting layer sectionresults in an excessively high contact resistance, and disablesoperation at an appropriate operation voltage. Japanese Laid-Open PatentPublication “Tokkaihei” No. 1-225178 discloses a method of epitaxiallygrowing a contact layer composed of In_(x)Ga_(1-x)As (also referred toas InGaAs, hereinafter) directly on the light-emitting layer section bythe MOVPE (metal-organic vapor phase epitaxy) process, and furtherforming thereon the ITO transparent electrode layer. On the other hand,Japanese Laid-Open Patent Publication “Tokkaihei” No. 6-188455 disclosesa method of epitaxially growing a GaAs layer on the light-emitting layersection by the MOVPE process, forming thereon the ITO transparentelectrode layer, and then annealing it.

This invention is to provide a method of fabricating a light-emittingdevice, in which the ITO transparent electrode layers as thelight-emission drive electrodes are bonded as being underlain by thecontact layers, to thereby reduce contact resistance of theseelectrodes, and to thereby make the contact layers less susceptible todifference in the lattice constants with those of the light-emittinglayer section during the formation thereof, and also to provide alight-emitting device further improved in the performance throughstructural improvement in the contact layer.

The InGaAs contact layer formed by the MOVPE process adopted in theaforementioned prior arts differs in the lattice constants by as largeas 4% or around in maximum on the alloy composition basis, from those ofa compound semiconductor composing the light-emitting layer section,such as GaAs, or AlGaAs or AlGaInP grown epitaxially on a GaAssubstrate. This raises problems below.

(1) This is highly causative of quality degradation such as lowering inthe light emission efficiency, due to lattice mismatching between theInGaAs contact layer and the light-emitting layer section.

(2) It is difficult for the method disclosed in Japanese Laid-OpenPatent Publication “Tokkaihei” No. 1-225178, in which the InGaAs contactlayer is directly grown by epitaxy, to uniformly grow the contact layer,due to the above-described difference in the lattice constants withthose of the light-emitting layer section, and this tends to result inisland-patterned film formation, to thereby fail in securing asatisfactory contact with the ITO transparent electrode layer. On theother hand, an embodiment disclosed in Japanese Laid-Open PatentPublication “Tokkaihei” No. 6-188455, in which the ITO transparentelectrode layer is formed and then annealed, adopts an annealingtemperature of as high as 800° C., and an annealing time of as long as 5minutes.

SUMMARY OF THE INVENTION

Aiming at solving the aforementioned problems, a method of fabricating alight-emitting device of this invention is such as fabricating alight-emitting device having a light-emitting layer section configuredas having a double heterostructure in which a first conductivity typecladding layer, an active layer, and a second conductivity type claddinglayer, all of which being composed of (Al_(x)Ga_(1-x))_(y)In_(1-y)P(where, 0≦x≦1, 0≦y≦1), are stacked in this order, and further comprisingan ITO transparent electrode layer applying drive voltage forlight-emission to the light-emitting layer section on at least eitherside of the first conductivity type cladding layer and the secondconductivity type cladding layer, comprising the steps of:

-   -   forming a GaAs layer on the light-emitting layer section,        forming the ITO transparent electrode layer so as to contact        with the GaAs layer; and annealing the stack so as to allow In        to diffuse from the ITO transparent electrode layer into the        GaAs layer to thereby convert it into a contact layer composed        of In-containing GaAs.

The aforementioned light-emitting layer section can realize an extremelyhigh light emission efficiency, because holes and electrons injected inthe narrow active layer are confined and can efficiently recombine, dueto energy barriers ascribable to difference in the band gap between theactive layer and the cladding layer formed on both sides thereof. It isalso made possible to realize a wide range of emission wavelength fromgreen to red regions (with a peak emission wavelength of 520 nm to 670nm, both ends inclusive), through compositional adjustment of the activelayer composed of AlGaInP. In the method of fabricating a light-emittingdevice of this invention, the GaAs layer is formed on the light-emittinglayer section composed of AlGaInP, and the ITO transparent electrodelayer is formed so as to contact with the GaAs layer. The light-emittinglayer section is typically composed of a III-V compound semiconductor,and can typically be formed by the publicly-known MOVPE process,together with the GaAs layer formed thereon (where, insertion of anyother lattice-matched layer permissible). The GaAs layer can veryreadily be lattice-matched with the AlGaInP light-emitting layersection, and can form a uniform and highly continuous film as comparedwith the case of direct epitaxial growth of InGaAs disclosed in JapaneseLaid-Open Patent Publication “Tokkaihei” No. 1-225178.

The ITO transparent electrode layer is then formed on the GaAs layer,and the stack is annealed so as to allow In to diffuse from the ITOtransparent electrode layer into the GaAs layer, to thereby form thecontact layer. The contact layer composed of In-containing GaAs thusobtained through the annealing will never have an excessive In content,and can effectively prevent quality degradation such as lowering in theemission intensity due to lattice mismatching with the light-emittinglayer section. The lattice matching between the GaAs layer and thelight-emitting layer section becomes particularly desirable when thelight-emitting layer section is composed of(Al_(x)Ga_(1-x))_(y)In_(1-y)P (where, 0≦x≦1, 0.45≦y≦0.55), so that itcan be said desirable to form the light-emitting layer section (claddinglayer or active layer) while adjusting alloy composition y within theabove range.

The above-described annealing is preferably carried out so as to make anIn concentration distribution in the thickness-wise direction of thecontact layer continuously reduce as becoming more distant away from theITO transparent electrode layer in the thickness-wise direction (thatis, In concentration distribution is gradated), as shown by {circlearound (1)} in FIG. 6. This type of structure can be formed by annealingso as to allow In to diffuse unidirectionally from the ITO side towardsthe contact layer side. A first aspect of the light-emitting device ofthis invention is characterized by having a light-emitting layer sectionconfigured as having a double heterostructure in which a firstconductivity type cladding layer, an active layer, and a secondconductivity type cladding layer, all of which being composed of(Al_(x)Ga_(1-x))_(y)In_(1-y)P (where, 0≦x≦1, 0≦y≦1), are stacked in thisorder; having an ITO transparent electrode layer applying drive voltagefor light-emission to the light-emitting layer section on at leasteither side of the first conductivity type cladding layer and the secondconductivity type cladding layer, so as to extract light from thelight-emitting layer section through the ITO transparent electrodelayer; and having a contact layer composed of In-containing GaAs, formedbetween the light-emitting layer section and the ITO transparentelectrode layer, as being in contact with the ITO transparent electrodelayer, wherein the contact layer is designed to have an In concentrationdistribution in the thickness-wise direction thereof continuouslyreducing as becoming more distant away from the ITO transparentelectrode layer in the thickness-wise direction. This means that the Inconcentration distribution of the contact layer is reduced on the sideof the light-emitting layer section composed of AlGaInP, or in otherwords, difference in the lattice constants from those of thelight-emitting layer section decreases. Formation of the contact layerhaving this sort of In concentration distribution raises an advantage offurther improving the lattice matching with the light-emitting layersection. An excessively high annealing temperature, or an excessivelylong annealing time will fail in obtaining these effect, because thisresults in an excessive proceeding of the In diffusion from the ITOtransparent electrode layer, and makes the In concentration distributionin the contact layer remain almost constant and at a high level in thethickness-wise direction in the contact layer, as indicated by {circlearound (3)} in FIG. 6 (an excessively low annealing temperature, orexcessively short annealing time will result in shortage of the Inconcentration in the contact layer, as indicated by {circle around (2)}in FIG. 6).

In this case, assuming now in FIG. 6 that In concentration of thecontact layer at the boundary position with the ITO transparentelectrode layer as C_(A), and In concentration at the boundary positionon the opposite side as C_(B), it is preferable to adjust C_(B)/C_(A) to0.8 or below, and it is preferable to carry out the above-describedannealing so as to obtain such In concentration distribution.C_(B)/C_(A) exceeding 0.8 results in only a poor improving effect of thelattice matching property with the light-emitting layer section throughgradient in the In concentration distribution. If a mean Inconcentration C_(M) of the contact layer can be maintained at theabove-described desirable value (0.1 to 0.6, both ends inclusive) on thebasis of atomic ratio of In to the total concentration of In and Ga, itis of no problem that the In concentration C_(B) of the contact layer atthe boundary position opposite to that facing to the ITO transparentelectrode layer becomes zero, or in other words, that the InGaAs layeris formed on the ITO-transparent-electrode side of the contact layer,and the GaAs layer on the opposite side, as shown in FIG. 7. Thethickness-wise compositional distribution of the contact layer (In or Gaconcentration distribution) can be measured while gradually etching thelayer in the thickness-wise direction, by publicly-known surfaceanalytical methods such as SIMS (secondary ion mass spectroscopy), AES(Auger electron spectroscopy), and XPS (X-ray photoelectronspectroscopy). The average composition of the contact layer can bemeasured by calculating an integral average of concentrationdistribution in the thickness-wise direction.

The average In concentration of the contact layer is preferably adjustedto a range from 0.1 to 0.6 on the basis of atomic ratio of In to thetotal concentration of In and Ga, and it is also preferable to carry outthe above-described annealing so as to achieve such average Inconcentration. The above-defined In concentration less than 0.1 resultsin only an insufficient effect of reducing contact resistance of thecontact layer, and exceeding 0.6 results in a considerable degradationin the quality such as lowered light emitting intensity, due to latticemismatching between the contact layer and the light-emitting layersection.

ITO is an indium oxide film doped with tin oxide, and adjustment of tinoxide content thereof to 1% by mass to 9% by mass (indium oxide contentto 91% by mass to 99% by mass) can suppress resistivity of the electrodelayer to as low enough as 5×10⁻⁴ Ω·cm. Formation of this sort of ITOtransparent electrode layer on the GaAs layer, and by further annealingit within an appropriate temperature range makes it possible to readilyform the contact layer having the above-described desirable Inconcentration. The annealing is also successful in further reducing theresistivity of the ITO transparent electrode layer. The annealing ispreferably carried out within a temperature range lower than thatdescribed in the Japanese Laid-Open Patent Publication “Tokkaihei” No.1-225178, more specifically in a range from 600° C. to 750° C. Theannealing temperature exceeding 750° C. results in a too large diffusionrate of In into the GaAs layer, and tends to make the In concentrationin the contact layer excessive. This also results in saturation of theIn concentration and makes it difficult to obtain the In concentrationgradient in the thickness-wise direction in the contact layer. The bothconsequently worsen the lattice matching between the contact layer andthe light-emitting layer section. An excessive proceeding of the Indiffusion into the GaAs layer causes In depletion in the ITO transparentelectrode layer at around the contact portion with the contact layer,and inevitably results in increase in the resistivity of the electrode.Furthermore, the above-described excessively high annealing temperaturemakes oxygen in ITO diffuse into the GaAs layer and promote oxidation,and thereby makes the series resistance of the device more likely toincrease. Both cases raise nonconformity in that the light-emittingdevice cannot be driven at an appropriate voltage. An extremely highannealing temperature may sometimes worsen the resistivity of the ITOtransparent electrode layer, against expectation. On the other hand, theannealing temperature less than 650° C. excessively lowers the diffusionrate of In into the GaAs layer, and needs an extremely long time forobtaining the contact layer lowered in the contact resistance to asatisfactory degree, and this considerably lowers efficiency in thefabrication.

The annealing time is preferably set to 5 seconds to 120 seconds, bothends inclusive. The annealing time longer than 120 seconds tends to makethe amount of In diffusion into the GaAs layer excessive, especially forthe case where the annealing temperature is set at a temperature closeto the upper limit. It is, however, also allowable to adopt a longerannealing time (up to 300 seconds or around), if the annealingtemperature is set a little lower. On the other hand, the annealing timeless than 5 seconds results in only an insufficient amount of Indiffusion into the GaAs layer, and makes it difficult to obtain thecontact layer lowered the contact resistance to a sufficient degree.

The ITO transparent electrode layer can be formed so as to cover theentire surface of the light-emitting layer section. This configurationmakes the ITO transparent electrode layer have a function of currentspreading layer, and consequently makes it possible to get rid of aconventional thick current spreading layer composed of a compoundsemiconductor, or makes it possible to largely reduce the thickness ifit is daringly formed. This contributes to the cost reduction throughsimplification of the process, and is very beneficial in terms ofindustrial application. On the other hand, the thickness of the contactlayer may not so necessarily be large so far as it is thick enough toform ohmic contact. More specifically, it is all enough to secure thethickness so that the compound semiconductor composing the contact layerwill never show a band gap energy different from that of the bulkcrystal due to thinning of the layer, and a thickness of 0.001 μm oraround will be sufficient when In_(x)Ga_(1-x)As is used. On the otherhand, excessive increase in the thickness of the contact layer composedof In_(x)Ga_(1-x)As results in increase in light absorption by thecontact layer, and lowers the light extraction efficiency. The thicknessis therefore preferably adjusted to 0.02 μm or below. Making the contactlayer as a thin layer of 0.001 μm to 0.02 μm thick is also effective interms of moderating influences of the lattice mismatching.

Between the contact layer and either of the cladding layer of the firstconductivity type cladding layer and the second conductivity typecladding layer located on the side of formation of the contact layer, anintermediate layer having an intermediate band gap energy between thoseof the contact layer and the cladding layer can be formed. A secondaspect of the light-emitting device of this invention is characterizedby having a light-emitting layer section composed of a compoundsemiconductor layer, and an ITO transparent electrode layer applyingdrive voltage for light-emission to the light-emitting layer section, soas to extract light from the light-emitting layer section through theITO transparent electrode layer; and having a contact layer composed ofIn-containing GaAs, formed between the light-emitting layer section andthe ITO transparent electrode layer, as being in contact with the ITOtransparent electrode layer, wherein the light-emitting layer section isconfigured as having a double heterostructure in which a firstconductivity type cladding layer, an active layer, and a secondconductivity type cladding layer are stacked in this order; a contactlayer is formed between at least either one of the first conductivitytype cladding layer and the second conductivity type cladding layer, andthe ITO transparent electrode layer; and, between the contact layer andeither cladding layer of the first conductivity type cladding layer andthe second conductivity type cladding layer located on the side offormation of the contact layer, an intermediate layer having anintermediate band gap energy between those of the contact layer and thecladding layer is formed.

It is necessary for the light-emitting layer section in the doubleheterostructure to raise the barrier height between the cladding layerand the active layer to a certain level or more, in order to enhance thecarrier confinement effect in the active layer, to thereby improve theinternal quantum efficiency. As shown in a schematic band chart of FIG.10 (Ec and Ev express energy levels at the bottom of the conductionband, and at the top of the valence band, respectively), direct bondingof the contact layer to the cladding layer sometimes results information of a relatively high heterobarrier between the cladding layerand the contact layer due to bonding-induced bend of the band. Thebarrier height ΔE increases as the band edge discontinuity between thecladding layer and the contact layer increases, and is advantageous ininhibiting movement of carriers, in particular holes having a largereffective mass. For an exemplary case where a metal electrode is used,the electrode must be formed so as to attain a partial coverage, becausethe total coverage by the metal electrode disables the light extraction.In this case, in order to improve the light extraction efficiency, it isnecessary to enhance the in-plane current spreading outwardly from theelectrode. The metal electrode is often formed on the light-emittinglayer section while placing the contact layer such as GaAs in between,wherein the formation of an appropriately high barrier height betweenthe contact layer and the light-emitting layer section is advantageousfor the metal electrode, because the in-plane current spreading can bepromoted by virtue of the carrier dam-up effect of the barrier. Theformation of high barrier height inevitably increases series resistance.

On the contrary, there is no need of considering the carrier dam-upeffect by the barrier when the ITO transparent electrode layer is used,because the ITO transparent electrode layer per se has an extremelylarge current spreading ability. What is better, adoption of the ITOtransparent electrode layer is successful in considerably increasingarea of the light extraction region as compared with that for the casewhere the metal electrode is used. Insertion, between the contact layerand the cladding layer, of the intermediate layer having a band gapenergy intermediate of those of the contact layer and the claddinglayer, as shown in FIG. 11, reduces band edge discontinuity valuesbetween the contact layer and the intermediate layer, and between theintermediate layer and the cladding layer, respectively, and thereby theindividual barrier heights ΔE formed therebetween become small. This isconsequently successful in moderating the series resistance, and inachieving a sufficiently large light emitting intensity at a low drivevoltage.

Effects of adoption of the configuration according to the second aspectof the light-emitting device of this invention becomes eminent, inparticular for the case where the light-emitting layer section in thedouble heterostructure is composed of AlGaInP which shows a relativelydesirable lattice matching property with In-containing GaAs composingthe contact layer. In this case, a layer containing at least any one ofan AlGaAs layer, a GaInP layer and an AlGaInP layer (having compositionsadjusted so as to make the band gap energies smaller than that of thecladding layer) can preferably be adopted as the intermediate layerhaving a band gap energy intermediate of those of the light-emittinglayer section and the contact layer composed of In-containing GaAslayer, and the intermediate layer can be configured typically asincluding the AlGaAs layer. It is also adoptable to any otherlight-emitting layer section, such as the light-emitting layer sectionhaving a double heterostructure composed of In_(x)Ga_(y)Al_(1-x-y)N.This light-emitting layer section can realize an emission wavelengthranging from ultraviolet region to red region (peak emission wavelengthresides in a range from 300 nm to 700 nm), depending on compositionaladjustment of the active layer. In this case, a layer typicallycontaining an InGaAlN layer (having composition adjusted so as to makethe band gap energy smaller than that of the cladding layer) canpreferably be adopted as the intermediate layer. In view of maximizingthe effects of lowering the drive voltage and improving the lightextraction efficiency, it is preferable to adopt a configuration inwhich the intermediate layer and the contact layer are formed over theentire surface of the light-emitting layer section, and the ITOtransparent electrode layer is formed over the entire surface of thecontact layer.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a schematic view showing a stacked structure of an exemplarylight-emitting device of this invention;

FIG. 2 is a schematic view showing a stacked structure of anotherexemplary light-emitting device of this invention;

FIG. 3 is a schematic view showing a fabrication process of thelight-emitting device shown in FIG. 1;

FIG. 4A is a schematic view as continued from FIG. 3;

FIG. 4B is a schematic view as continued from FIG. 4A;

FIG. 5 is a schematic view as continued from FIG. 4B;

FIG. 6 is a schematic chart showing an exemplary In concentrationdistribution of a contact layer, together with a comparative example;

FIG. 7 is a schematic chart showing another exemplary In concentrationdistribution of the contact layer;

FIG. 8 is a schematic view showing an exemplary device configuration inwhich the contact layer and an ITO transparent electrode layer areformed only on a first main surface of a light-emitting layer section;

FIG. 9 is a schematic view showing an exemplary device configuration inwhich an intermediate layer is inserted between the contact layer andthe cladding layer on the light extraction surface side shown in FIG. 8;

FIG. 10 is a schematic drawing showing a first example of a bandstructure of the contact layer;

FIG. 11 is a schematic drawing showing a second example of a bandstructure of the contact layer;

FIG. 12 is a schematic view showing an exemplary device configuration inwhich a light reflection layer is inserted on a second main surface sideof a light extraction layer shown in FIG. 5;

FIG. 13A is a first schematic view of an active layer having a quantumwell structure;

FIG. 13B is a second schematic view of an active layer having a quantumwell structure; and

FIG. 13C is a third schematic view of an active layer having a quantumwell structure.

BEST MODES FOR CARRYING OUT THE INVENTION

The following paragraphs will describe best modes for carrying out thisinvention, referring to the attached drawings.

FIG. 1 is a conceptual drawing showing a light-emitting device 100according to one embodiment of this invention. The light-emitting device100 has a contact layer 7 and an ITO transparent electrode layer 8formed in this order, on a first main surface 17 side of alight-emitting layer section 24. On a second main surface 18 side of thelight-emitting layer section_24, a contact layer 9 and an ITOtransparent electrode layer 10 are formed in this order. The ITOtransparent electrode layers 8, 10 are formed, together with the contactlayer 7 and the contact layer 9, so as to cover the individual entiresurfaces on both main surfaces 17, 18 sides of the light-emitting layersection 24.

The light-emitting layer section 24 has a double heterostructurecomprising a first conductivity type cladding layer 6, a secondconductivity type cladding layer 4, and an active layer disposed betweenthe first conductivity type cladding layer 6 and the second conductivitytype cladding layer 4, all of which being composed of(Al_(x)Ga_(1-x))_(y)In_(1-y)P (where, 0≦x≦1, 0≦y≦1). More specifically,it is configured by placing the active layer 5 composed of non-doped(Al_(x)Ga_(1-x))_(y)In_(1-y)P (where, 0≦x≦0.55, 0.45≦y≦0.55) between thep-type (Al_(x)Ga_(1-x))_(y)In_(1-y)P cladding layer 6 and the n-type(Al_(x)Ga_(1-x))_(y)In_(1-y)P cladding layer 4, respectively having aband gap energy larger than that of the active layer 5. In thelight-emitting device 100 shown in FIG. 1, the p-type AlGaInP claddinglayer 6 is disposed on the ITO transparent electrode layer 8 side, andthe n-type AlGaInP cladding layer 4 is disposed on the ITO transparentelectrode layer 10 side. The ITO transparent electrode layer 8 sidetherefore has a positive polarity under current supply. It is to benoted, although obvious for those skilled in the art, that “non-doped”referred to herein means “not intentionally added with a dopant”, andnever excludes possibility of any dopant components inevitably includedin the normal fabrication process (up to 10¹³ to 10¹⁶/cm³ or around, forexample).

Both of the contact layers 7, 9 are composed of In-containing GaAs, anda mean In concentration C_(M) is adjusted to 0.1 to 0.6 on the basis ofatomic ratio of In to the total concentration of In and Ga, in {circlearound (1)} shown in FIG. 6. The In concentration continuously reducesas becoming more distant away from the ITO transparent electrode layerin the thickness-wise direction, and is adjusted so as to makeC_(B)/C_(A)fall on 0.8 or below, where C_(A) is In concentration at theindividual boundary positions with the ITO transparent electrode layers8, 10 (FIG. 1), and C_(B)is In concentration at the boundary position onthe opposite side (i.e., individual boundary positions with the claddinglayers 6, 4 (FIG. 1)). Thickness of the contact layers 7, 9 is adjustedwithin a range from 0.001 μm to 0.02 μm (more preferably from 0.005 μmto 0.01 μm).

In the light-emitting device 100 shown in FIG. 1, specific examples ofthe thickness of the individual layers can be given as below:

-   -   contact layer 7=thickness: approx. 0.005 μm;    -   ITO transparent electrode layer 8=thickness: 0.4 μm, tin oxide        content: 7% by mass (and the balance of indium oxide);    -   p-type AlGaInP cladding layer 6= 1 μm;    -   AlGaInP active layer 5= 0.6 μm;    -   n-type AlGaInP cladding layer 4= 1 μm;    -   contact layer 9= thickness: approx. 0.005 μm; and    -   ITO transparent electrode layer 10= same configuration with the        ITO transparent electrode layer 8.

The following paragraphs will describe the method of fabricating thelight-emitting device 100 shown in FIG. 1.

First, as shown in FIG. 3, on a first main surface 1 a of a GaAs singlecrystal substrate 1, which is a compound semiconductor single crystalsubstrate allowing lattice matching with AlGaInP mixed alloy, an n-typeGaAs buffer layer 2 of typically 0.5 μm thick is epitaxially grown, andfurther thereon, as a light-emitting layer section 24, the n-typeAlGaInP cladding layer 4 of 1 μm thick, the AlGaInP active layer(non-doped) 5 of 0.6 μm thick, the p-type AlGaInP cladding layer 6 of 1μm thick are epitaxially grown, and further on the p-type AlGaInPcladding layer 6, a GaAs layer 7′ of 0.005 μm is epitaxially grown. Theepitaxial growth of the individual layers can be carried out by thepublicly-known MOVPE process.

After the growth, the product is dipped in an etching solution typicallycomposed of a sulfuric-acid-base aqueous solution (concentrated sulfuricacid: 30% aqueous hydrogen peroxide solution: water=3:1:1 capacityratio), to thereby etch off the GaAs substrate 1 and the GaAs bufferlayer 2 (FIG. 4A). Then as shown in FIG. 4B, on the main surface 18 ofthe n-type AlGaInP cladding layer 4 on the etched-off side, a GaAs layer9′ of 0.005 μm is epitaxially grown by the MOVPE process.

Respectively on both main surfaces of the GaAs layer 7′ and the GaAslayer 9′, the ITO transparent electrode layers 8, 10 respectively havinga thickness of 0.4 μm are formed by the publicly-known RF sputteringprocess (target composition (In₂O₃=90.2% by weight, SnO₂=9.8% byweight), an RF frequency of 13.56 MHz, an Ar pressure of 0.6 Pa, and asputtering power of 30 W), to thereby obtain a stacked wafer 13.

The stacked wafer 13 is then placed in a furnace F as shown in FIG. 5,and annealed typically in a nitrogen atmosphere or in an atmosphere ofinert gas such as Ar, at an annealing temperature as low as 600° C. to750° C. or below (700° C., for example), and for an annealing time asshort as 5 seconds to 120 seconds (30 seconds, for example). This allowsIn to diffuse from the ITO transparent electrode layers 8, 10 into theGaAs layers 7′, 9′, to thereby obtain the contact layers 7, 9 having theIn concentration distribution shown in FIG. 6 (or FIG. 7). The annealedstacked wafer 13 is diced to produce semiconductor chips, each chip isfixed on a support, attached with lead wires 14 b, 15 b as shown in FIG.1, and molded by forming a resin molding portion not shown, to therebyproduce the light-emitting device 100.

In the above-described light-emitting device 100, the entire surfaces ofthe p-type AlGaInP cladding layer 6 and the n-type AlGaInP claddinglayer 4 are covered with the ITO transparent electrode layer 8 and theITO transparent electrode layer 10, respectively, while placing thecontact layer 7 and the contact layer 9 in between, wherein drivevoltage is supplied through the ITO transparent electrode layers 8, 10.Drive current ascribable to the drive voltage can uniformly spread overthe entire surface of the ITO transparent electrode layers 8, 10 havingan excellent electro-conductivity, and this is successful in obtaining auniform light emission over the entire portion of the light extractionsurface (both main surfaces 17, 18), and in improving the lightextraction efficiency by virtue of transparency of the electrodes 8, 10.Other advantages reside in that the series resistance of the contactportion can be suppressed to a small level, and in that the emissionefficiency can be raised to a considerable degree, because the ITOtransparent electrode layers 8, 10 can establish ohmic contact statewith the contact layers 7, 9 having a relatively small band gap. Thisalso successfully gets rid of any thick current spreading layer,shortens the distance between the ITO transparent electrode layer andthe light emission surface, and thereby reduces the series resistance.

The contact layers 7, 9 are first formed as the GaAs layers 7′, 9′having a desirable lattice matching property with the light-emittinglayer section 24 composed of AlGaInP, and is then annealed at arelatively low temperature for a short period of time, so as to have anIn content not excessive, but uniform and continuous enough. This issuccessful in effectively preventing quality degradation such as loweredlight emitting intensity, due to lattice mismatching with thelight-emitting layer section 24.

The contact layers 7, 9 may be formed by adding an appropriate dopant asthose respectively having the conductivity types same with those of thecladding layers 6, 4 in contact therewith, wherein this way of formationis adoptable without problems, because the contact layers 7, 9 formed asthis sort of thin films will not result in an excessive increase in theseries resistance if they are formed as a low-doped layer having a lowdopant concentration (e.g., 10¹⁷/cm³ or below; or non-doped layer(10¹³/cm³ to 10¹⁶/cm³). Moreover, the low-doped layer can achieve theeffects described below, depending on the drive voltage of thelight-emitting device. The contact layer configured as a low-doped layeris consequently raised in the resistivity per se, so that electric field(or, voltage per unit distance) applied in the thickness-wise directionof the contact layer will become relatively higher than those applied tothe cladding layer or to the ITO transparent electrode layers 8, 10holding the contact layer in between and having smaller values ofresistivity. The contact layer herein configured using In-containingGaAs having a relatively small band gap results in an appropriate bendin the band structure of the contact layer under the applied electricfield, and is successful in forming a better ohmic contact. This effectis made more distinct by virtue of the In concentration of the contactlayers 7, 9 increased on the contact side with the ITO transparentelectrode layers 8, 10, as shown in FIG. 6 or FIG. 7.

It is supposed herein that direct bonding of an lnGaAs layer and anAlGaInP layer may result in formation of a somewhat higher heterobarrierat the bonded interface, and this may consequently raise the seriesresistance component. For the purpose of reducing the resistivity, it isallowable to respectively insert, between the contact layers 7, 9 incontact with the ITO transparent electrode layers 8, 10 and the AlGaInPcladding layers 6, 4, intermediate layers 11, 12 having a band gapenergy intermediate of those of the both, as indicated by dashed linesin FIG. 1. The intermediate layers 11, 12 can be configured typically ascontaining at least any one of AlGaAs, GaInP and AlGaInP, and it is alsoallowable to configure the entire portion of each of the intermediatelayers as a single AlGaAs layer. Even for the case where suchconfiguration is adopted, thickness of each of the intermediate layerscan be adjusted to as small as approximately 0.1 μm or below (0.01 μm orabove: further thinning results in disappearance of the band structureof the bulk, and fails in obtaining a desired bonded structure), so thatthe thinning of the layer is successful in shortening the epitaxialgrowth time, improving the productivity, and reducing a risk of loweringthe emission efficiency through reduction in increase in the seriesresistance due to formation of the intermediate layers.

The light-emitting device having this sort of intermediate layers 11, 12formed therein can be configured as a wide-gap-type, light-emittingdevice 200 for blue to ultraviolet emission, in which the individuallayers (a p-type cladding layer 106, an active layer 105, and an n-typecladding layer 104) of a double heterostructured light-emitting layersection 124, shown in FIG. 2, are formed using AlGaInN alloyed crystal.The light-emitting layer section 124 is formed by the MOVPE process,similarly to the case of the light-emitting device 100 shown in FIG. 1.The configuration of the light-emitting device 200 shown in FIG. 2 isequivalent to that of the light-emitting device 100 shown in FIG. 1,except for the light-emitting layer section 124, so that this will notbe detailed below.

It is to be noted that, as shown by a light-emitting device 50 shown inFIG. 8, the light-emitting layer section 24 having the doubleheterostructured layer may also be bonded with the contact layer and theITO transparent electrode layer only on one side thereof. In this case,the n-type GaAs substrate 1 is used as the device substrate, and willhave the contact layer 7 and the ITO transparent electrode layer 8formed on the first main surface side thereof.

FIG. 9 shows an example having, with respect to the ITO transparentelectrode layer 8 on the light extraction surface side, the intermediatelayers 20, 21 formed between the contact layer 7 and the cladding layer6. The contact layer 7 is composed of an InGaAs layer and a GaAs layer,as shown in FIG. 7, which contribute to reduction in the band edgediscontinuity value. The intermediate layers 20, 21 are composed of aplurality of layers, which are two layers of an AlGaAs layer 20 and anAlGaInP layer 21 in this embodiment, having the band gap energiesstep-wisely reduced towards the cladding layer side (a single layerhaving a continuously decreasing band gap energy is also allowable),similarly contributing to reduction in the band end discontinuity. Inparticular for the case where the active layer of the light-emittinglayer section 24 has a large band gap energy, or in other words, has ashort emission wavelength, it is inevitably necessary to increase theband gap energy also on the cladding layer side, in order to ensure thea necessary-and-enough level of band edge discontinuity for securing thecarrier confinement effect also on the active layer side (use ofAlGaInP, for example, needs use of a cladding layer having a large Alcontent). This case results in increase also in the barrier heightformed at the boundary with the contact layer, so that use of theplurality of intermediate layers 20, 21 makes a great sense.

It is also allowable, as exemplified by a light-emitting device 51 shownin FIG. 12, to insert a reflection layer 16, such as a semiconductormulti-layered film disclosed typically in Japanese Laid-Open PatentPublication “Tokkaihei” No. 7-66455, or metal layer composed of Au or Aualloy, between the GaAs substrate 1 and the light-emitting layer section24. This is successful in raising the light extraction efficiency,because the light L directly leaks from the light-emitting layer section24 towards the light extraction layer side is added with the reflectedlight L′ from the reflection layer 16. In order to further reduce thetotal reflection loss, it is still also allowable to curve the boundarybetween the light-emitting layer section and the light extraction layerso as to convex it in the direction of the light extraction, asdisclosed in Japanese Laid-Open Patent Publication “Tokkaihei” No.5-190893.

The active layer 5 or 105 was configured as a single layer in theabove-described embodiment, but may also be configured as a stack of aplurality of compound semiconductor layers differed in the band gapenergies, and more specifically, as having a quantum well structureshown in FIG. 13A. The active layer having the quantum well structureis, as shown in FIG. 13B and FIG. 13C, a stack of two layers differed inthe band gap energy thereof from each other through adjustment of thealloy compositions, that are a well layer B having a small band gapenergy and a barrier layer A having a large band gap energy, each ofwhich having a thickness not larger than the mean free path of electrontherein (generally a single atomic layer to several tens of Angstroms),stacked in a lattice-matched manner. Because energy of electron (orhole) in the well layer B is quantized, the above configuration, appliedto semiconductor laser devices and so forth, makes it possible toarbitrarily adjust the oscillation wavelength depending on the width ordepth of the energy well layer, and is successful in stabilizing theoscillation wavelength, improving the emission efficiency, and loweringthe oscillation threshold current density. This is also advantageous inthat the difference in the lattice constants of as much as 2 to 3% canbe tolerated because both of the well layer B and barrier layer A areextremely small in the thickness, and this facilitates expansion of theoscillation wavelength range. The quantum well structure herein may be amultiple quantum well structure having a plurality of well layers B asshown in FIG. 13B, or may be a single quantum well structure having onlya single well layer B as shown in FIG. 13C. In FIGS. 13A to 13C, thep-type and n-type cladding layers are configured using(Al_(0.7)Ga_(0.3))_(0.5)In_(0.5)P alloy, the barrier layer A using(Al_(0.5)Ga_(0.5))_(0.5)In_(0.5)P alloy, and the well layer B using(Al_(0.2)Ga_(0.8))_(0.5)In_(0.5)P alloy. It is to be noted that thethickness of the barrier layer A can be adjusted to 50 nm or around onlyfor the layers in contact with the cladding layers, and can be adjustedto 6 nm for the other layers. The well layer B can be adjusted to 5 nmthick or around.

1. A method of fabricating a light-emitting device having a light-emitting layer section configured as having a double heterostructure in which a first conductivity type cladding layer, an active layer, and a second conductivity type cladding layer, all of which being composed of (Al_(x)Ga_(1-x))_(y)In_(1-y)P (where, 0≦x≦1, 0≦y≦1), are stacked in this order, and further comprising an ITO transparent electrode layer applying drive voltage for light-emission to the light-emitting layer section on at least either side of the first conductivity type cladding layer and the second conductivity type cladding layer, comprising the steps of: forming a GaAs layer on the light-emitting layer section; forming the ITO transparent electrode layer so as to contact with the GaAs layer to form a stack including the GaAs layer and the ITO transparent electrode layer; and annealing the stack so as to allow In to diffuse from the ITO transparent electrode layer into the GaAs layer to thereby convert it into a contact layer composed of In-containing GaAs, wherein the annealing is carried out so as to adjust a mean In concentration of the contact layer within a range from 0.1 to 0.6 on the basis of atomic ratio of In to the total concentration of In and Ga, wherein the annealing is carried out so as to adjust C_(B)/C_(A) to 0.8 or below, where C_(A) is In concentration at a boundary position between the contact layer and the ITO transparent electrode layer, and C_(B) is In concentration at a boundary position on the opposite side, and wherein the light-emitting layer section is configured using (Al_(x)Ga_(1-x))_(y)In_(1-y)P (where, 0≦x≦1, 0.45≦y≦0.55) to ensure lattice matching between the GaAs layer and the light-emitting layer section.
 2. The method of fabricating a light-emitting device as claimed in claim 1, wherein the annealing is carried out at 600° C. to 750° C., both ends inclusive.
 3. The method of fabricating a light-emitting device as claimed in claim 2, wherein process time of the annealing is set to 5 seconds to 120 seconds, both ends inclusive.
 4. The method of fabricating a light-emitting device as claimed in claim 1, wherein thickness of the contact layer is adjusted within a range from 0.001 μm to 0.02 μm, both ends inclusive.
 5. The method of fabricating a light-emitting device as claimed in claim 1, wherein the annealing is carried out so as to make an In concentration distribution in the thickness-wise direction of the contact layer continuously reduce as becoming more distant away from the ITO transparent electrode layer in the thickness-wise direction.
 6. The method of fabricating a light-emitting device as claimed in claim 1, further comprising a step of forming, between the contact layer and either cladding layer of the first conductivity type cladding layer and the second conductivity type cladding layer located on the side of formation of the contact layer, an intermediate layer having an intermediate band gap energy between those of the contact layer and the cladding layer.
 7. The method of fabricating a light-emitting device as claimed in claim 6, wherein the intermediate layer is formed as containing at least any one of an AlGaAs layer, a GaInP layer and an AlGaInP layer.
 8. The method of fabricating a light-emitting device as claimed in claim 6, wherein the intermediate layer and the contact layer are formed over the entire surface of the light-emitting layer section in this order, and the ITO transparent electrode layer is formed so as to cover the entire surface of the contact layer.
 9. A light-emitting device having a light-emitting layer section configured as having a double heterostructure in which a first conductivity type cladding layer, an active layer, and a second conductivity type cladding layer, all of which being composed of (Al_(x)Ga_(1-x))_(y)In_(1-y)P (where, 0≦x≦1, 0≦y≦1), are stacked in this order; having an ITO transparent electrode layer applying drive voltage for light-emission to the light-emitting layer section on at least either side of the first conductivity type cladding layer and the second conductivity type cladding layer, so as to extract light from the light-emitting layer section through the ITO transparent electrode layer; and having a contact layer composed of In-containing GaAs, formed between the light-emitting layer section and the ITO transparent electrode layer, as being in contact with the ITO transparent electrode layer, wherein the contact layer is designed to have an In concentration distribution in a thickness-wise direction thereof continuously reducing as becoming more distant away from the ITO transparent electrode layer in the thickness-wise direction, wherein a mean In concentration of the contact layer is adjusted within a range from 0.1 to 0.6 on the basis of atomic ratio of In to the total concentration of In and Ga, wherein the contact layer is designed to have C_(B)/C_(A) of 0.8 or below, where C_(A) is In concentration at a boundary position between the contact layer and the ITO transparent electrode layer, and C_(B) is In concentration at a boundary position on the opposite side, and wherein the light-emitting layer section is configured using (Al_(x)Ga_(1-x))_(y)In_(1-y)P (where, 0≦x≦1, 0.45≦y≦0.55) to ensure lattice matching between a GaAs layer and the light-emitting layer section.
 10. The light-emitting device as claimed in claim 9, wherein thickness of the contact layer is adjusted within a range from 0.001 μm to 0.02 μm, both ends inclusive.
 11. The light-emitting device as claimed in claim 9, further comprising, between the contact layer and either cladding layer of the first conductivity type cladding layer and the second conductivity type cladding layer located on the side of formation of the contact layer, an intermediate layer having an intermediate band gap energy between those of the contact layer and the cladding layer.
 12. The method of fabricating a light-emitting device as claimed in claim 2, wherein thickness of the contact layer is adjusted within a range from 0.001 μm to 0.02 μm, both ends inclusive.
 13. The method of fabricating a light-emitting device as claimed in claim 2, wherein the annealing is carried out so as to make an In concentration distribution in the thickness-wise direction of the contact layer continuously reduce as becoming more distant away from the ITO transparent electrode layer in the thickness-wise direction.
 14. The method of fabricating a light-emitting device as claimed in claim 2, further comprising a step of forming, between the contact layer and either cladding layer of the first conductivity type cladding layer and the second conductivity type cladding layer located on the side of formation of the contact layer, an intermediate layer having an intermediate band gap energy between those of the contact layer and the cladding layer.
 15. The method of fabricating a light-emitting device as claimed in claim 14, wherein the intermediate layer is formed as containing at least any one of an AlGaAs layer, a GaInP layer and an AlGaInP layer.
 16. The method of fabricating a light-emitting device as claimed in claim 14, wherein the intermediate layer and the contact layer are formed over the entire surface of the light-emitting layer section in this order, and the ITO transparent electrode layer is formed so as to cover the entire surface of the contact layer.
 17. The method of fabricating a light-emitting device as claimed in claim 7, wherein the intermediate layer and the contact layer are formed over the entire surface of the light-emitting layer section in this order, and the ITO transparent electrode layer is formed so as to cover the entire surface of the contact layer.
 18. The method of fabricating a light-emitting device as claimed in claim 15, wherein the intermediate layer and the contact layer are formed over the entire surface of the light-emitting layer section in this order, and the ITO transparent electrode layer is formed so as to cover the entire surface of the contact layer. 